Benchmark CPA/Tiger-MGP TBF Test-Suite Validator
Tool CPAchecker 1.8-svn 30541M Tbf Test-suite Validator v1.2
Limits timelimit: 900 s, memlimit: 15000 MB, CPU core limit: 8 timelimit: 10800 s, memlimit: 7000 MB, CPU core limit: 2
Host apollon*
OS Linux 4.15.0-45-generic
System CPU: Intel Xeon E3-1230 v5 @ 3.40 GHz, cores: 8, frequency: 3.8 GHz, Turbo Boost: disabled; RAM: 33546 MB
Date of execution 2019-02-05 21:13:54 CET 2019-02-06 06:15:02 CET
Run set cpa-tiger.test-comp19_prop-coverage-error-call.ReachSafety-BitVectors tbf-testsuite-validator-cpa-tiger.test-comp19_prop-coverage-error-call.ReachSafety-BitVectors
Options -benchmark -heap 10000M -tigertestcomp19 --verbose --sequence-file cov-seq.txt -r --stop-after-found-violation --test-suite ../../results-verified/cpa-tiger.2019-02-05_2113.logfiles/${rundefinition_name}.${inputfile_name}.files/test-suite.zip
sv-benchmarks/c/ status score program test-suite TS size inspect test-suite cpu (s) wall (s) mem (MB) energy (J) blkio-w (MB) blkio-r (MB) status program test-suite TS size inspect test-suite cov branch cov (%) line cov (%) cpu (s) wall (s) mem (MB) energy blkio-w (MB) blkio-r (MB)
bitvector/byte_add-1.yml unknown 1 prog tests 1 inspect 14   10   310 170 .0041 0   true prog tests 1 inspect
66.7 95.3 .13  .13  16   .086 0  
bitvector/s3_clnt_1.BV.c.cil-2.yml unknown 1 prog tests 1 inspect 8.8 3.9 360 82 .0041 0   true prog tests 1 inspect
30.9 46.3 .27  .27  17   .12  0  
bitvector/s3_clnt_2.BV.c.cil-2.yml unknown 1 prog tests 1 inspect 18   11   370 190 .0041 0   true prog tests 1 inspect
30.6 41.9 .30  .30  17   .12  0  
bitvector/s3_clnt_3.BV.c.cil-2.yml unknown 1 prog tests 1 inspect 6.1 2.4 310 56 .0041 0   true prog tests 1 inspect
26.5 40.6 .27  .27  17   .12  0  
bitvector/soft_float_1-3.c.cil.yml unknown 1 prog tests 1 inspect 4.3 1.7 280 42 .0041 0   true prog tests 1 inspect
18.9 29.6 .14  .14  17   .098 0  
bitvector/soft_float_4-3.c.cil.yml unknown 1 prog tests 1 inspect 3.9 1.7 280 34 .0041 0   true prog tests 1 inspect
23.8 33.1 .13  .13  16   .090 0  
bitvector/sum02-1.yml timeout prog tests 0 inspect 900   870   3200 8700 .0041 0   unknown prog tests 0 inspect
0   0   .068 .073 8.9 0     0  
bitvector-regression/recHanoi03-1.yml error (recursion) prog tests 0 inspect 2.8 1.2 260 27 .0041 0   unknown prog tests 0 inspect
0   0   .062 .062 9.0 0     0  
bitvector-loops/diamond_2-1.yml unknown 1 prog tests 1 inspect 3.1 1.4 280 31 .0041 0   true prog tests 1 inspect
54.2 96.5 .13  .15  16   .078 0  
bitvector-loops/verisec_sendmail_tTflag_arr_one_loop.yml timeout prog tests 0 inspect 900   900   630 15000 .0041 0   unknown prog tests 0 inspect
0   0   .059 .059 9.0 0     0  
sv-benchmarks/c/ status score program test-suite TS size inspect test-suite cpu (s) wall (s) mem (MB) energy (J) blkio-w (MB) blkio-r (MB) status program test-suite TS size inspect test-suite cov branch cov (%) line cov (%) cpu (s) wall (s) mem (MB) energy blkio-w (MB) blkio-r (MB)
total 10 7 1900 1800 6300 25000 .041 0   10 252 383 1.5 1.6 140 .71 0  
Run set cpa-tiger.test-comp19_prop-coverage-error-call.ReachSafety-BitVectors tbf-testsuite-validator-cpa-tiger.test-comp19_prop-coverage-error-call.ReachSafety-BitVectors