Benchmark FairFuzz TBF Test-Suite Validator
Tool FairFuzz TC-0.0.2 Tbf Test-suite Validator v1.2
Limits timelimit: 900 s, memlimit: 15000 MB, CPU core limit: 8 timelimit: 10800 s, memlimit: 7000 MB, CPU core limit: 2
Host apollon*
OS Linux 4.15.0-45-generic
System CPU: Intel Xeon E3-1230 v5 @ 3.40 GHz, cores: 8, frequency: 3.8 GHz, Turbo Boost: disabled; RAM: 33546 MB
Date of execution 2019-02-08 09:39:09 CET 2019-02-08 13:22:04 CET
Run set fairfuzz.test-comp19_prop-coverage-error-call.ReachSafety-BitVectors tbf-testsuite-validator-fairfuzz.test-comp19_prop-coverage-error-call.ReachSafety-BitVectors
Options --verbose --sequence-file cov-seq.txt -r --stop-after-found-violation --test-suite ../../results-verified/fairfuzz.2019-02-08_0939.logfiles/${rundefinition_name}.${inputfile_name}.files/test-suite.zip
sv-benchmarks/c/ status score program test-suite TS size inspect test-suite cpu (s) wall (s) mem (MB) energy (J) blkio-w (MB) blkio-r (MB) status program test-suite TS size inspect test-suite cov branch cov (%) line cov (%) cpu (s) wall (s) mem (MB) energy blkio-w (MB) blkio-r (MB)
bitvector/byte_add-1.yml false(unreach-call) 1 prog tests 27 inspect 44 41 18 140 .30 0   true prog tests 1 inspect
91.7  100   .15 .17 16 .17  0  
bitvector/s3_clnt_1.BV.c.cil-2.yml false(unreach-call) 1 prog tests 47 inspect 300 280 17 900 .47 0   true prog tests 1 inspect
71.0  80.8 .41 .39 17 1.7   0  
bitvector/s3_clnt_2.BV.c.cil-2.yml done prog tests 1 inspect 26 24 13 110 .25 0   unknown prog tests 0 inspect
2.50 19.2 .21 .21 17 .12  0  
bitvector/s3_clnt_3.BV.c.cil-2.yml done prog tests 1 inspect 26 24 14 120 .25 0   unknown prog tests 0 inspect
3.09 19.3 .21 .21 17 .12  0  
bitvector/soft_float_1-3.c.cil.yml false(unreach-call) 1 prog tests 131 inspect 100 93 21 550 .37 0   true prog tests 1 inspect
51.4  59.2 .15 .15 17 .24  0  
bitvector/soft_float_4-3.c.cil.yml false(unreach-call) 1 prog tests 122 inspect 210 200 23 500 .43 0   true prog tests 1 inspect
50.0  57.5 .14 .14 17 .14  0  
bitvector/sum02-1.yml false(unreach-call) 1 prog tests 34 inspect 740 740 10 11000 .40 0   true prog tests 1 inspect
87.5  100   5.9  5.9  16 .11  0  
bitvector-regression/recHanoi03-1.yml false(unreach-call) 1 prog tests 28 inspect 690 690 11 8700 .32 0   true prog tests 1 inspect
75.0  91.7 .12 .12 17 .13  0  
bitvector-loops/diamond_2-1.yml false(unreach-call) 1 prog tests 2 inspect 23 21 18 80 .20 0   true prog tests 1 inspect
100    100   .12 .15 16 .094 0  
bitvector-loops/verisec_sendmail_tTflag_arr_one_loop.yml false(unreach-call) 1 prog tests 12 inspect 39 36 17 170 .29 0   true prog tests 1 inspect
100    100   .15 .15 17 .19  0  
sv-benchmarks/c/ status score program test-suite TS size inspect test-suite cpu (s) wall (s) mem (MB) energy (J) blkio-w (MB) blkio-r (MB) status program test-suite TS size inspect test-suite cov branch cov (%) line cov (%) cpu (s) wall (s) mem (MB) energy blkio-w (MB) blkio-r (MB)
total 10 8 2200 2100 160 23000 3.3 0   10 632 728 7.5 7.6 170 3.0 0  
Run set fairfuzz.test-comp19_prop-coverage-error-call.ReachSafety-BitVectors tbf-testsuite-validator-fairfuzz.test-comp19_prop-coverage-error-call.ReachSafety-BitVectors