Benchmark PRtest TBF Test-Suite Validator
Tool tbf v0.3.0-testcomp19 Tbf Test-suite Validator v1.2
Limits timelimit: 900 s, memlimit: 15000 MB, CPU core limit: 8 timelimit: 10800 s, memlimit: 7000 MB, CPU core limit: 2
Host apollon* [apollon010; apollon052; apollon080; apollon107; apollon135; apollon167]
OS Linux 4.15.0-45-generic
System CPU: Intel Xeon E3-1230 v5 @ 3.40 GHz, cores: 8, frequency: 3.8 GHz, Turbo Boost: disabled; RAM: 33546 MB
Date of execution 2019-02-06 06:02:44 CET 2019-02-06 13:26:19 CET
Run set prtest.test-comp19_prop-coverage-branches.ReachSafety-ECA tbf-testsuite-validator-prtest.test-comp19_prop-coverage-branches.ReachSafety-ECA
Options --stats -i random --write-xml --svcomp-nondets --verbose --sequence-file cov-seq.txt -r --test-suite ../../results-verified/prtest.2019-02-06_0602.logfiles/${rundefinition_name}.${inputfile_name}.files/test-suite.zip
sv-benchmarks/c/ status score program test-suite TS size inspect test-suite cpu (s) wall (s) mem (MB) energy (J) blkio-w (MB) blkio-r (MB) status program test-suite TS size inspect test-suite cov branch cov (%) line cov (%) cpu (s) wall (s) mem (MB) energy blkio-w (MB) blkio-r (MB)
eca-rers2012/Problem03_label00.yml .0718 900 840 52 12000 .016  0   7.18 8.36 .46 .46 58 2.1  0  
eca-rers2012/Problem03_label01.yml .0718 900 840 52 11000 .016  0   7.18 8.36 .49 .51 57 2.5  0  
eca-rers2012/Problem03_label02.yml .0718 900 840 52 12000 .029  0   7.18 8.36 .45 .46 57 2.5  0  
eca-rers2012/Problem03_label03.yml .0718 900 840 52 14000 .016  0   7.18 8.36 .48 .48 57 2.1  0  
eca-rers2012/Problem03_label04.yml .0718 900 840 52 15000 .029  0   7.18 8.36 .44 .43 58 2.5  0  
eca-rers2012/Problem03_label05.yml .0718 900 840 52 16000 .029  0   7.18 8.36 .45 .45 58 2.1  0  
eca-rers2012/Problem03_label06.yml .0718 900 840 52 13000 .029  0   7.18 8.36 .45 .45 58 2.1  0  
eca-rers2012/Problem03_label07.yml .0718 900 840 52 13000 .029  0   7.18 8.36 .45 .45 57 2.1  0  
eca-rers2012/Problem03_label08.yml .0718 900 840 52 12000 .029  0   7.18 8.36 .45 .45 57 2.1  0  
eca-rers2012/Problem03_label09.yml .0718 900 840 52 14000 .029  0   7.18 8.36 .49 .49 57 2.5  0  
eca-rers2012/Problem03_label10.yml .0718 900 840 52 15000 .029  0   7.18 8.36 .46 .46 57 2.5  0  
eca-rers2012/Problem03_label11.yml .0718 900 840 52 12000 .016  0   7.18 8.36 .52 .52 57 2.1  0  
eca-rers2012/Problem03_label12.yml .0718 900 840 52 13000 .016  0   7.18 8.36 .47 .46 58 2.1  0  
eca-rers2012/Problem03_label13.yml .0718 900 840 52 11000 .029  0   7.18 8.36 .48 .48 57 2.1  0  
eca-rers2012/Problem03_label14.yml .0718 900 840 52 14000 .016  0   7.18 8.36 .47 .47 58 2.1  0  
eca-rers2012/Problem03_label15.yml .0718 900 840 52 13000 .016  0   7.18 8.36 .52 .52 57 2.1  0  
eca-rers2012/Problem03_label16.yml .0718 900 840 52 13000 .029  0   7.18 8.36 .46 .46 58 2.1  0  
eca-rers2012/Problem03_label17.yml .0718 900 840 52 12000 .029  0   7.18 8.36 .48 .50 57 1.3  0  
eca-rers2012/Problem03_label18.yml .0718 900 840 52 12000 .016  0   7.18 8.36 .48 .48 58 2.1  0  
eca-rers2012/Problem03_label19.yml .0718 900 840 52 12000 .016  0   7.18 8.36 .47 .47 57 2.1  0  
eca-rers2012/Problem03_label20.yml .0718 900 840 52 13000 .029  0   7.18 8.36 .47 .47 57 2.1  0  
eca-rers2012/Problem03_label21.yml .0718 900 840 52 15000 .016  0   7.18 8.36 .48 .50 57 2.1  0  
eca-rers2012/Problem03_label22.yml .0718 900 840 52 12000 .029  0   7.18 8.36 .48 .49 57 1.1  0  
eca-rers2012/Problem03_label23.yml .0718 900 840 52 12000 .016  0   7.18 8.36 .52 .52 58 2.1  0  
eca-rers2012/Problem03_label24.yml .0718 900 840 52 12000 .016  0   7.18 8.36 .46 .50 58 1.1  0  
eca-rers2012/Problem03_label25.yml .0718 900 840 52 12000 .029  0   7.18 8.36 .47 .50 57 2.1  0  
eca-rers2012/Problem03_label26.yml .0718 900 840 52 14000 .029  0   7.18 8.36 .45 .45 57 2.1  0  
eca-rers2012/Problem03_label27.yml .0718 900 840 52 14000 .029  0   7.18 8.36 .48 .47 57 2.1  0  
eca-rers2012/Problem03_label28.yml .0718 900 840 52 12000 .016  0   7.18 8.36 .47 .47 57 2.5  0  
eca-rers2012/Problem03_label29.yml .0718 900 840 52 13000 .029  0   7.18 8.36 .50 .50 58 2.5  0  
eca-rers2012/Problem03_label30.yml .0718 900 840 52 13000 .016  0   7.18 8.36 .47 .50 58 1.1  0  
eca-rers2012/Problem03_label31.yml .0718 900 840 52 14000 .029  0   7.18 8.36 .43 .43 57 1.7  0  
eca-rers2012/Problem03_label32.yml .0718 900 840 52 12000 .029  0   7.18 8.36 .45 .45 57 2.1  0  
eca-rers2012/Problem03_label33.yml .0718 900 840 52 12000 .016  0   7.18 8.36 .45 .46 57 2.5  0  
eca-rers2012/Problem03_label34.yml .0718 900 840 52 14000 .029  0   7.18 8.36 .46 .46 58 2.5  0  
eca-rers2012/Problem03_label35.yml .0718 900 840 52 12000 .020  0   7.18 8.36 .49 .49 58 2.1  0  
eca-rers2012/Problem03_label36.yml .0718 900 840 52 14000 .016  0   7.18 8.36 .51 .51 58 2.5  0  
eca-rers2012/Problem03_label37.yml .0718 900 840 52 12000 .016  0   7.18 8.36 .47 .47 58 1.8  0  
eca-rers2012/Problem03_label38.yml .0718 900 840 52 15000 .016  0   7.18 8.36 .47 .47 57 2.2  0  
eca-rers2012/Problem03_label39.yml .0718 900 840 52 13000 .045  0   7.18 8.36 .51 .51 58 2.1  0  
eca-rers2012/Problem03_label40.yml .0718 900 840 52 12000 .016  0   7.18 8.36 .46 .45 58 2.1  0  
eca-rers2012/Problem03_label41.yml .0718 900 840 52 12000 .016  0   7.18 8.36 .47 .47 57 2.1  0  
eca-rers2012/Problem03_label42.yml .0718 900 840 52 13000 .016  0   7.18 8.36 .47 .47 57 2.1  0  
eca-rers2012/Problem03_label43.yml .0718 900 840 52 13000 .020  0   7.18 8.36 .46 .50 58 2.5  0  
eca-rers2012/Problem03_label44.yml .0718 900 840 52 15000 .016  0   7.18 8.36 .45 .45 58 2.1  0  
eca-rers2012/Problem03_label45.yml .0718 900 840 52 12000 .016  0   7.18 8.36 .45 .45 57 2.5  0  
eca-rers2012/Problem03_label46.yml .0718 900 840 52 13000 .025  0   7.18 8.36 .50 .50 58 2.1  0  
eca-rers2012/Problem03_label47.yml .0718 900 840 52 13000 .029  0   7.18 8.36 .49 .49 58 2.1  0  
eca-rers2012/Problem03_label48.yml .0718 900 840 52 13000 .016  0   7.18 8.36 .50 .50 57 2.1  0  
eca-rers2012/Problem03_label49.yml .0718 900 840 52 13000 .016  0   7.18 8.36 .50 .50 58 2.1  0  
eca-rers2012/Problem03_label50.yml .0718 900 840 52 14000 .016  0   7.18 8.36 .53 .56 57 1.1  0  
eca-rers2012/Problem03_label51.yml .0718 900 840 52 12000 .029  0   7.18 8.36 .46 .46 57 1.1  0  
eca-rers2012/Problem03_label52.yml .0718 900 840 52 12000 .049  0   7.18 8.36 .43 .43 58 2.5  0  
eca-rers2012/Problem03_label53.yml .0718 900 840 52 12000 .029  0   7.18 8.36 .50 .52 58 2.1  0  
eca-rers2012/Problem03_label54.yml .0718 900 840 52 12000 .029  0   7.18 8.36 .44 .44 58 2.5  0  
eca-rers2012/Problem03_label55.yml .0718 900 840 52 13000 .029  0   7.18 8.36 .51 .50 57 2.1  0  
eca-rers2012/Problem03_label56.yml .0718 900 840 52 13000 .029  0   7.18 8.36 .43 .43 58 2.2  0  
eca-rers2012/Problem03_label57.yml .0718 900 840 52 14000 .029  0   7.18 8.36 .44 .44 58 2.1  0  
eca-rers2012/Problem03_label58.yml .0718 900 840 52 13000 .016  0   7.18 8.36 .51 .51 58 2.1  0  
eca-rers2012/Problem03_label59.yml .0718 900 840 52 14000 .029  0   7.18 8.36 .44 .44 57 2.1  0  
eca-rers2012/Problem04_label00.yml .0987 900 840 66 14000 .029  0   9.87 15.7  1.1  1.1  110 4.6  0  
eca-rers2012/Problem04_label01.yml .0987 900 840 65 13000 .016  0   9.87 15.7  1.1  1.1  110 6.9  0  
eca-rers2012/Problem04_label02.yml .0987 900 840 65 14000 .029  0   9.87 15.7  1.1  1.1  110 6.8  0  
eca-rers2012/Problem04_label03.yml .0987 900 840 65 14000 .025  0   9.87 15.7  1.1  1.1  110 5.9  0  
eca-rers2012/Problem04_label04.yml .0987 900 840 65 14000 .016  0