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ESBMC 2024-12-17 20:38:01 CET esbmc-incr.Test-Comp25_coverage-branches.ReachSafety-XCSP
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TestCov 2024-12-23 23:58:50 CET testcov-validate-test-suites-clang-formatted-esbmc-incr.Test-Comp25_coverage-branches.ReachSafety-XCSP
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TestCov 2024-12-23 23:58:50 CET testcov-validate-test-suites-clang-unformatted-esbmc-incr.Test-Comp25_coverage-branches.ReachSafety-XCSP
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TestCov 2024-12-23 23:58:49 CET testcov-validate-test-suites-gcc-formatted-esbmc-incr.Test-Comp25_coverage-branches.ReachSafety-XCSP
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TestCov 2024-12-23 23:58:50 CET testcov-validate-test-suites-gcc-unformatted-esbmc-incr.Test-Comp25_coverage-branches.ReachSafety-XCSP
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Benchmark Setup
Benchmark | ESBMC-incr | TestCov | |||||||||||||||||||||||||||||||||||||||||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Tool | ESBMC version 7.7.0 64-bit x86_64 linux | TestCov 3.11 | |||||||||||||||||||||||||||||||||||||||||||||||
Limits | timelimit: 900 s, memlimit: 15000 MB, CPU core limit: 4 | timelimit: 600 s, memlimit: 7000 MB, CPU core limit: 2 | |||||||||||||||||||||||||||||||||||||||||||||||
Host | apollon* | ||||||||||||||||||||||||||||||||||||||||||||||||
OS | Linux 6.8.0-51-generic | ||||||||||||||||||||||||||||||||||||||||||||||||
System | CPU: Intel Xeon E3-1230 v5 @ 3.40 GHz, cores: 8, frequency: 3800 MHz, Turbo Boost: disabled; RAM: 33471 MB | ||||||||||||||||||||||||||||||||||||||||||||||||
Date of execution | 2024-12-17 20:38:01 CET | 2024-12-23 23:58:50 CET | 2024-12-23 23:58:49 CET | 2024-12-23 23:58:50 CET | |||||||||||||||||||||||||||||||||||||||||||||
Run set | esbmc-incr.Test-Comp25_coverage-branches.ReachSafety-XCSP | testcov-validate-test-suites-clang-formatted-esbmc-incr.Test-Comp25_coverage-branches.ReachSafety-XCSP | testcov-validate-test-suites-clang-unformatted-esbmc-incr.Test-Comp25_coverage-branches.ReachSafety-XCSP | testcov-validate-test-suites-gcc-formatted-esbmc-incr.Test-Comp25_coverage-branches.ReachSafety-XCSP | testcov-validate-test-suites-gcc-unformatted-esbmc-incr.Test-Comp25_coverage-branches.ReachSafety-XCSP | ||||||||||||||||||||||||||||||||||||||||||||
Options |
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Properties | coverage-branches |
Statistics
ESBMC 2024-12-17 20:38:01 CET esbmc-incr.Test-Comp25_coverage-branches.ReachSafety-XCSP
TestCov 2024-12-23 23:58:50 CET testcov-validate-test-suites-clang-formatted-esbmc-incr.Test-Comp25_coverage-branches.ReachSafety-XCSP
TestCov 2024-12-23 23:58:50 CET testcov-validate-test-suites-clang-unformatted-esbmc-incr.Test-Comp25_coverage-branches.ReachSafety-XCSP
TestCov 2024-12-23 23:58:49 CET testcov-validate-test-suites-gcc-formatted-esbmc-incr.Test-Comp25_coverage-branches.ReachSafety-XCSP
TestCov 2024-12-23 23:58:50 CET testcov-validate-test-suites-gcc-unformatted-esbmc-incr.Test-Comp25_coverage-branches.ReachSafety-XCSP
Click here to select columns
status
score
cpu
(s)
(s)
wall
(s)
(s)
mem
(MB)
(MB)
status
cov
(%)
(%)
cpu
(s)
(s)
wall
(s)
(s)
mem
(MB)
(MB)
status
cov
(%)
(%)
cpu
(s)
(s)
wall
(s)
(s)
mem
(MB)
(MB)
status
cov
(%)
(%)
cpu
(s)
(s)
wall
(s)
(s)
mem
(MB)
(MB)
status
cov
(%)
(%)
cpu
(s)
(s)
wall
(s)
(s)
mem
(MB)
(MB)
all results
119
104
14000
14000
16000
119
10400
170
190
9600
119
10400
160
180
9300
119
10400
170
190
8900
119
10400
160
180
8600
correct results
107
104
3500
3500
9000
0
-
-
-
-
0
-
-
-
-
0
-
-
-
-
0
-
-
-
-
correct true
0
-
-
-
-
0
-
-
-
-
0
-
-
-
-
0
-
-
-
-
0
-
-
-
-
correct false
107
104
3500
3500
9000
0
-
-
-
-
0
-
-
-
-
0
-
-
-
-
0
-
-
-
-
incorrect results
0
-
-
-
-
0
-
-
-
-
0
-
-
-
-
0
-
-
-
-
0
-
-
-
-
incorrect true
0
-
-
-
-
0
-
-
-
-
0
-
-
-
-
0
-
-
-
-
0
-
-
-
-
incorrect false
0
-
-
-
-
0
-
-
-
-
0
-
-
-
-
0
-
-
-
-
0
-
-
-
-
Generated by BenchExec 3.29